NXP Semiconductors /LPC408x_7x /COMPARATOR /CTRL0

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Interpret as CTRL0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DISABLED)CMP0_EN 0 (DISABLED)CMP0_OE 0 (CMP0_STAT)CMP0_STAT 0 (VREF_DIVIDER_0_)CMP0_VM 0RESERVED 0 (VREF_DIVIDER_0_)CMP0_VP 0RESERVED 0 (DIRECT)CMP0_SYNC 0 (HYSTERESISOFF)CMP0_HYS 0 (NOTINVERTED)CMP0_INTPOL 0 (EDGE)CMP0_INTTYPE 0 (FALLING)CMP0_INTEDGE 0 (NOTPENDING)CMP0_INTFLAG 0 (DISABLED)CMP0_VLADEN 0 (VREF_CMP_PIN_)CMP0_VLADREF 0RESERVED 0CMP0_VSEL0RESERVED

CMP0_INTTYPE=EDGE, CMP0_HYS=HYSTERESISOFF, CMP0_VLADEN=DISABLED, CMP0_VP=VREF_DIVIDER_0_, CMP0_SYNC=DIRECT, CMP0_VM=VREF_DIVIDER_0_, CMP0_INTEDGE=FALLING, CMP0_INTPOL=NOTINVERTED, CMP0_OE=DISABLED, CMP0_EN=DISABLED, CMP0_VLADREF=VREF_CMP_PIN_, CMP0_INTFLAG=NOTPENDING

Description

Comparator 0 control register

Fields

CMP0_EN

Comparator 0 enable control.

0 (DISABLED): Comparator 0 disabled.

1 (DIS_DEEPSLP_PWRDWN): Comparator 0 is disabled in Deep Sleep and Power-down modes and re-enabled automatically when exiting those modes.

2 (DIS_PWRDWN): Comparator 0 is disabled in Power-down mode and re-enabled automatically when exiting Power-down.

3 (ENABLED): Comparator 0 is enabled.

CMP0_OE

Comparator 0 output enable.

0 (DISABLED): Comparator 0 output is disabled.

1 (ENABLED): Comparator 0 output is enabled.

CMP0_STAT

Comparator 0 status. This bit reflects the comparator 0 output, and is not affected by CMP0_OE.

CMP0_VM

Comparator 0 VM input select.

0 (VREF_DIVIDER_0_): Vref divider 0.

1 (CMP0_IN0): CMP0_IN[0].

2 (CMP0_IN1): CMP0_IN[1].

3 (CMP0_IN2): CMP0_IN[2].

4 (CMP0_IN3): CMP0_IN[3].

5 (CMP1_IN0): CMP1_IN[0].

6 (INTERNAL_0_9_V_BAND_): internal 0.9 V band gap reference.

7 (TEMPERATURE_SENSOR_): temperature sensor.

RESERVED

Reserved.

CMP0_VP

Comparator 0 VP input select.

0 (VREF_DIVIDER_0_): Vref divider 0.

1 (CMP0_IN0): CMP0_IN[0].

2 (CMP0_IN1): CMP0_IN[1].

3 (CMP0_IN2): CMP0_IN[2].

4 (CMP0_IN3): CMP0_IN[3].

5 (CMP1_IN0): CMP1_IN[0].

6 (INTERNAL_0_9_V_BAND_): internal 0.9 V band gap reference.

7 (TEMPERATURE_SENSOR_): temperature sensor.

RESERVED

Reserved.

CMP0_SYNC

Comparator 0 output synchronization control.

0 (DIRECT): The comparator 0 output is used directly.

1 (SYNCH): The comparator 0 output is synchronized with the internal bus clock for output to other peripherals.

CMP0_HYS

Comparator 0 hysteresis control. When enabled, hysteresis determines the difference required between the comparator inputs before the comparator output switches. The difference must be in the direction opposite of the current comparator output.

0 (HYSTERESISOFF): Hysteresis is turned off, comparator output will change as the input voltages cross.

1 (HYSTERESIS_EQ_5_MV_): Hysteresis = 5 mV.

2 (HYSTERESIS_EQ_10_MV_): Hysteresis = 10 mV.

3 (HYSTERESIS_EQ_15_MV_): Hysteresis = 15 mV.

CMP0_INTPOL

Selects the polarity of the CMP0 output for purposes of generating level interrupts. See Table 412.

0 (NOTINVERTED): The CMP0 output is used as-is for generating interrupts.

1 (INVERTED): The CMP0 output is used inverted for generating interrupts.

CMP0_INTTYPE

Select comparator 0 interrupt type. See Table 412.

0 (EDGE): Comparator 0 interrupt is edge triggered.

1 (LEVEL): Comparator 0 interrupt is level triggered.

CMP0_INTEDGE

Select edge triggered interrupt to be active on either high or low transitions, when CMP0_IntType = 0. See Table 412.

0 (FALLING): Comparator 0 interrupt is active on falling edges.

1 (RISING): Comparator 0 interrupt is active on rising edges.

2 (DUALEDGE): Comparator 0 Interrupt is active on both edges.

3 (RESERVED_): reserved.

CMP0_INTFLAG

Comparator 0 interrupt flag.

0 (NOTPENDING): The Comparator 0 interrupt is not pending.

1 (PENDING): The Comparator 0 interrupt is pending. Writing a 1 to this bit clears the flag.

CMP0_VLADEN

Voltage ladder enable for comparator 0.

0 (DISABLED): The Comparator 0 voltage ladder is disabled.

1 (DIS_DEEPSLP_PWRDWN): The Comparator 0 voltage ladder is disabled in Deep Sleep and Power-down modes and re-enabled automatically when exiting those modes.

2 (DIS_PWRDWN): The Comparator 0 voltage ladder is disabled in Power-down mode and re-enabled automatically when exiting Power-down.

3 (ENABLED): The Comparator 0 voltage ladder is enabled.

CMP0_VLADREF

Voltage reference select for comparator 0 voltage ladder.

0 (VREF_CMP_PIN_): VREF_CMP pin.

1 (VDDA_PIN_): VDDA pin.

RESERVED

Reserved.

CMP0_VSEL

Voltage ladder value for comparator 0. The reference voltage Vref depends on the setting of CMP0_VLADREF (either VDD(3V3) or voltage on pin VREF_CMP). 00000 = Vss. 00001 = 1 x Vref0 / 31. 00010 = 2 x Vref0 / 31. … 11111 = Vref0

RESERVED

Reserved.

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